Field of the Invention
The present invention generally relates to a package structure and manufacturing method thereof. More particularly, the present invention relates to chip package structure and manufacturing method.
Description of Related Art
Modern electronic devices require small size, large memory capacity and high performance for their applications such as mobile applications. Consequently, semiconductor chip packages that go into modern electronic devices, such as mobile electronic devices, also have to have small size, large memory capacity, and high performance.
Typically, a printed circuit board (PCB) includes an insulating substrate, which is typically made of a polyimide material, and a conductive pattern, which is typically made of copper (Cu). The conductive pattern may be disposed in between layers of the substrate or it may be disposed on one of the substrate surfaces. When a chip package is used in an electronic system, such as the main board in a mobile electronic device, the package may be subjected to a high thermal process for bonding purposes. The high thermal process used to either form solder balls or join the chip package to the circuit board may cause warpage of the chip package due to the coefficient of thermal expansion (CTE) mismatch between the various components in the chip package. This warpage may lead to open connection failures between the chip package and the circuit board. Such warpage also causes non-uniform height of the solder balls against the main board during mounting, thereby causing contact failures.